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FPGA solutions for ultra-low latency SmartNIC

DESIGNED FOR NETWORK AND COMPUTE ACCELERATION

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What is OT - ULL FPGA Framework
Technical description and features
Inclusions
Key features
Deliverables
Ideal Uses
Pricing model and support
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Our product

ULL FPGA Framework for SmartNIC

THE BEST-IN-CLASS SOLUTION TO SUPPORT INVESTMENT BANKS, PROPRIETARY TRADING FIRMS, HEDGE FUNDS, AND EXCHANGES

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Orthogone Technologies offers a ready-to-implement ultra-low latency FPGA Framework for electronic trading
Designed to support real-time access and
response to fast-changing data
  • Level up your ultra-low latency infrastructure to accelerate trading.
  • Develop a portfolio of cutting-edge FPGA and software applications.
  • Minimize latency and rapidly develop FPGA-based SmartNIC solutions.
  • Gain a competitive advantage by processing large amounts of data with near zero latency.
  • Face the challenges of the fast-moving financial industry.
Typical Latency Performances:
  • 10G MAC/PCS: RTT 37.2ns (GTY + MAC/PCS + CDC), Measured from TxSoP to RxSoP with serial loopback)
  • 10G TCP/IP: 6.2ns Tx path (Cut-through mode, Store-and-Forward Mode (Payload ≤ 16B))
What is OT - ULL FPGA Framework

Hardware and software development framework designed to efficiently build ULL FPGA applications

The Orthogone Ultra Low Latency FPGA Framework consists of programmable, high-performance FPGAs and software development frameworks optimized for ultra-low latency applications. Created for electronic trading application developers, this solution integrates seamlessly with different platforms to meet specific acceleration requirements.

With the Orthogone suite of ready-to-use IP cores, developers can accelerate the time-to-market of high-performance trading engines in-house. By minimizing latency, market participants can stay ahead of the competition and increase trading profitability.

OT Framework Block Diagram

Typical use cases

Tick-to-trade electronic trading
Smart order routers
Pre-trade risk check engines
Exchange interconnects
Tick-to-trade electronic trading
Smart order routers
Pre-trade risk check engines
Exchange-interconnects
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Technical description and features

Quickly develop the ultimate portfolio of flexible FPGA and software applications

The complete development package includes a complete suite of IP cores, an end-to-end FPGA development environment and a comprehensive software framework. It provides users with the ability to quickly develop a broad portfolio of FPGA applications.

  • Improves performance for low-latency networking applications
  • Reduces time-to-production when developing ultra-low latency trading systems
  • Meet the demands of data center applications
  • Eliminates the time and effort of porting from one FPGA platform to another
  • Provides ongoing support to maintain leading-edge performance over time
  • Facilitates the transition to new FPGAs and digital transformation on existing systems
SUITE OF IP CORES INCLUDED
  • ULL MAC/PCS: Ultra-low latency Ethernet MAC/PCS
  • ULL TCP/IP: Implements a full TCP/IP stack in FPGA with ultra-low latency performances
  • ULL UDP/IP: Implements a full UDP/IP stack in FPGA with ultra-low latency performances
  • ULL PCIe DMA: Ultra-low latency DMA controller to move data between FPGA and host memory rapidly over PCIe interface
Key features
  • FPGA RTL design for lowest possible latency:
    • MAC/PCS
    • TCP/IP Offload Engine
    • UDP/IP Offload Engine
    • PCIe DMA Controller
  • Supports Xilinx UltraScale+ FPGA
  • Supports Xilinx Alveo FPGA platforms
  • FPGA simulation and verification environment
  • Linux CentOS distribution
  • Kernel bypass for optimized data path
  • Ultra-low latency C/C++ API with zero-copy optimized path
  • Advanced network statistics
  • Test and debug applications
DELIVERABLES
FPGA Development Kit
  • Encrypted FPGA IP cores
  • Reference design examples
  • Product datasheet and user guides
  • Test bench use case
  • FPGA build scripts
  • Test and debug applications for latency/throughput measurement
Software Framework
  • C/C++ API with zero-copy optimized path
  • FPGA Communication & IP core management via drivers & C/C++ libraries
  • Product documentation
Ideal Uses

For software and hardware intensive fintech application developers

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The performance offered by Orthogone's ultra-low latency FPGA Framework is ideal for developers of software-intensive fintech applications where latency is critical. Trading application developers can leverage our ready-to-use, ultra-high-performance framework to accelerate hardware performance.

Implement FPGA optimization, and quickly develop flexible software solutions when:

  • starting a new low-latency project
  • maintaining an existing project,
  • porting from one FPGA platform to another

The Orthogone suite of ready-to-use IP cores allows developers to speed time to market with high-performance applications. Financial institutions can react to market events faster than the competition to increase trading profitability.

Pricing model and support

ULL FPGA Framework
As experts in developing and customizing low-latency FPGA/ASIC IP cores, we also offer integration and post-sales services to support your internal team.

FLEXIBILITY IS THE KEY WORD HERE

We know how to adapt to your:
  • needs
  • business
  • budget
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on our licensing options

Ready for the next level?
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FPGA/ASIC IP Integration and customization

We also support the continued development of advanced technologies by designing custom FPGA development solutions for your unique needs. Through our design flow process, intellectual property portfolio, and advanced verification process, we provide complete solutions tailored to your project.

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